Job Opportunity
We are seeking a highly motivated and experienced professional with expertise in Analog Circuit Design, CMOS circuit design and layout methodology & flow. The ideal candidate will have a strong background in VLSI design and high-speed protocols.
The successful applicant will be responsible for designing DDR/HBM Memory Interface I/O Circuits and layouts, including GPIO and Special IO's. They will work closely with the DDR/HBM PHY team, package engineers, and system engineers to meet design specifications.
To succeed in this role, you should possess:
Bachelor's and/or Master's Degree in Electrical Engineering or similar with a focus on VLSI design.
10-15 years of experience in Analog Circuit Design, CMOS circuit design and layout methodology & flow.
You will be a creative problem-solver with excellent communication skills and the ability to work collaboratively across teams to deliver solutions to customers. You will also have the opportunity to travel occasionally to support customer engagements.
The Team
This collaborative team focuses on enabling our Interface IP customers to integrate the IP into their SoC and assist them through their design flows, debugging critical issues, and supporting silicon bring-up.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about the salary range and benefits during the hiring process.