Lead the Next Generation of High-Performance Data Communication Solutions
This is a senior leadership position where you will own the full SerDes analog and mixed-signal design strategy, guide technical direction, mentor engineers, and ensure delivery of industry-leading performance.
You will shape the architecture, influence design methodologies, and play a pivotal role in the successful release of complex products in advanced CMOS FinFET technologies.
* Provide technical leadership for the design of key SerDes IP.
* Oversee and be involved in the development of core analog building blocks.
* Define and drive SerDes architecture in collaboration with system architects and other functional teams.
* Establish robust verification and sign-off strategies to meet aggressive performance and reliability targets.
* Lead and mentor engineering teams, fostering best practices in design, simulation, and layout.
* Support silicon bring-up, validation, and characterization, providing direction through to product launch.
Requirements:
* Bachelor's or Master's in Electrical Engineering or related discipline, with 15+ years' industry experience.
* Proven leadership in analog and mixed-signal design for SerDes applications.
* Strong expertise in high-speed circuit design, signal integrity, and power integrity.
* Proficiency with EDA tools.
* Exceptional communication and decision-making skills, with the ability to lead in a fast-paced, collaborative environment.