Join a dynamic R&D team at Synopsys, where you will be working with a highly skilled and supportive group of engineers on cutting-edge projects.
Main Responsibilities
System Modeling and Simulation:
* Model signal and power integrity analysis to ensure Synopsys IP chip integration meets performance requirements.
* Simulate physical interconnect in a system context.
* Document analysis results for review by the team.
Interface Review and Troubleshooting:
* Review interface interconnect (e.g., package and PCB).
* Check system interface specifications compliance.
* Troubleshoot and debug interfaces performance.
Team Collaboration:
* Work on team-driven or task-oriented projects.
Requirements and Key Qualifications
Educational Background
* Degree in Electrical Engineering or equivalent.
Technical Skills
* Understanding of circuit and transmission line theory.
* Experience with circuit simulation using SPICE.
* Familiarity with both Windows and Linux operating systems.
* Some experience in programming languages such as Python.
Soft Skills
* Good English communication skills, both verbal and written.
* Good problem-solving skills.
* Willingness to learn new things and explore new technologies.
We are dedicated to innovation and strive to make a positive impact on society. Our mission is to empower innovators and leaders who bring bold ideas to life through our products and services. We value diversity, equity, and inclusion in all aspects of our business and foster a culture that encourages creativity, collaboration, and continuous improvement.