You Are:You are a highly experienced engineering professional, passionate about ASIC design methodologies and IP reuse.
With at least 3 years of solid experience in IP and SoC design and/or verification.
You have consistently demonstrated technical excellence and leadership in your career.
You thrive in challenging environments and are adept at architecting and working within an AI/EDA ecosystem.Your academic foundation includes a bachelor's degree in electronics, electrical, or computer engineering, and you continuously seek to expand your knowledge and impact in the field of ASIC design.
You are ready to take on a leadership role, shaping methodology and best practices for the next generation of high-performance silicon designs.What You'll Be Doing:- Applying AI techniques to accelerate front-end design methodology – leveraging internal and/or external agentic AI tools.
- Supporting IP teams and internal stakeholders by troubleshooting, optimizing, and debugging design processes and flows.
- Implementing reference front-end flows for Synopsys digital IP and mixed-signal IPs.
- Driving technical initiatives and independently managing high-impact assignments, ensuring timely and high-quality deliverables.
- Collaborating closely with tool and IP development teams to influence product evolution and optimize workflows for maximum efficiency.The Impact You Will Have:- Elevate Synopsys' IP capabilities by delivering robust, unified, and scalable methodology solutions.
- Empower global IP teams with best-in-class flows, tools, and practices, driving consistent project success.
- Mentor and develop the next wave of ASIC design engineers, fostering a culture of learning and technical excellence.
- Contribute to the evolution of Synopsys' EDA tool ecosystem by providing critical feedback and championing innovative solutions.
- Enhance Synopsys' leadership position in the semiconductor industry through continuous improvement and adoption of cutting-edge methodologies.What You'll Need:- Minimum 3 years of hands-on experience in IP/SoC design, with a proven track record of hands-on technical contributions.
- Good understanding of Agentic AI technologies.
- Familiarity with Synopsys EDA tools such as VCS, VC Spyglass, Design Compiler/Fusion Compiler, TestMAX, etc.- Demonstrated ability to validate design flows and infrastructure for complex digital designs.
- Solid programming and scripting skills (SystemVerilog, UVM, Tcl, Python or similar languages).
- Bachelor's degree in electronics, electrical, or computer engineering (advanced degrees a plus).
- Experience with multi-tasking and managing technical projects independently.
- Ability to document, communicate, and propagate technical methodologies across global teams.The Team You'll Be A Part Of:You will be a core member of the Digital Methodology Tools and Infrastructure team, a group of forward-thinking engineers dedicated to advancing IP design excellence at Synopsys.
The team collaborates across global sites, driving innovation in methodology, tool integration, and best practices.
Together, you will shape the future of IP, enabling Synopsys and its customers to deliver world-class silicon solutions.Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.
Our total rewards include both monetary and non-monetary offerings.
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